The SN74LVC2G34DCKR is a Dual Buffer Gate performs the Boolean function Y = A in positive logic. It is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
10μA Maximum ICC low power consumption
±24mA Output drive at 3.3V
IOFF supports live insertion, partial-power-down mode and back-drive protection
Latch-up performance exceeds 100mA per JESD 78, class-II
(EN)
