The SN74LS393N is a dual 4-bit Binary Counter having a clear and a clock input. It is implemented and providing the capability of divide-by-256. This counter has parallel outputs from each stage so that any sub-multiple of the input count frequency is available for system-timing signals. Dual 4-bit version can significantly improve system densities by reducing count by 50%.
Buffered outputs reduce possibility of collector commutation
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