The SN65LVDS32BD is a quad differential Line Receiver offers improved performance and features that implement the electrical characteristics of low-voltage differential signalling (LVDS). LVDS is defined in the TIA/EIA-644 standard. This improved performance represents the second generation of receiver products for this standard, providing a better overall solution for the cabled environment. This generation of products is an extension to TIs overall product portfolio and is not necessarily a replacement for older LVDS receivers. Improved features include an input common-mode voltage range 2V wider than the minimum required by the standard. This will allow longer cable lengths by tripling the allowable ground noise tolerance to 3V between a driver and receiver. Precise control of the differential input voltage thresholds now allows for inclusion of 50mV of input voltage hysteresis to improve noise rejection on slowly changing input signals.
Active failsafe assures a high-level output with no input
Inputs remain high-impedance on power-down
Integrated 110R line termination resistors offered with the LVDT series
Pin-compatible with the AM26LS32, MC3486 or μA9637
(EN)
