The SN65LVDS2D is a single low-voltage differential Line Driver and Receiver for battery-powered applications. The outputs comply with the TIA/EIA-644 standard and provide a minimum differential output voltage magnitude of 247mV into a 100R load at signalling rates up to 630Mbps for driver and 400Mbps for receiver. When the SN65LVDS1 device is used with an LVDS receiver (such as the SN65LVDT2) in a point-to-point connection, data or clocking signals can be transmitted over printed-circuit board traces or cables at very high rates with very low electromagnetic emissions and power consumption.
LVDT receiver includes line termination
Receiver open-circuit failsafe design
Bus-terminal ESD exceeds 9kV
Low-voltage differential signaling with typical output voltages of 350mV into a 100R load
Propagation delay time - 1.7ns Typical driver and 2.5ns typical receiver
Power dissipation at 200MHz - 25mW Typical driver and 60mW typical receiver
Low voltage TTL (LVTTL) level driver input is 5V tolerant
Driver is output high-impedance with VCC<1.5V
Receiver output and inputs are high-impedance with VCC<1.5V
Differential input voltage threshold less than 100mV
(EN)
