The SN65LVDS179D is a high-speed differential Line Driver and Receiver uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400Mbps. The TIA/EIA-644 standard-compliant electrical interface provides a minimum differential output voltage magnitude of 247mV into a 100R load and receipt of 100mV signals with up to 1V of ground potential difference between a transmitter and receiver. This device offers various drivers, receiver and enabling combinations in industry-standard footprints. Because this device is intended for use in simplex or distributed simplex bus structures, the driver enable function does not put the differential outputs into a high-impedance state but rather disconnects the input and reduces the quiescent power used by the device.
Receiver has open-circuit failsafe design
Full-duplex signalling rate up to 150Mbps
Bus-pin ESD exceeds 12kV
LVTTL input levels are 5V tolerant
Low-voltage differential signaling with typical output voltage of 350mV and a 100R load
Propagation delay time - 1.7ns Typical driver and 3.7ns typical receiver
Power dissipation at 200MHz - 25mW Typical driver and 60mW typical receiver
Receiver maintains high input impedance with VCC<1.5V
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