The PGA116AIPW is a zero-drift Programmable Gain Amplifier with MUX function. The PGA116 (binary and scope gains) offers 10 analog inputs, a SPI interface with daisy-chain capability, hardware and software shutdown. All version provides internal calibration channels for system-level calibration. The channels are tied to GND, 0.9 VCAL, 0.1 VCAL and VREF, respectively. VCAL, an external voltage connected to Channel 0, is used as the system calibration reference.
- Rail-to-rail input and output
- Four internal calibration channels
- Amplifier optimized for driving CDAC ADCs
- SPI? interface (10MHz) with daisy-chain capability
- 50mV to supply rails Output swing
- 12nV/√Hz Low noise
- ±5nA (25°C) Maximum input offset current
- 200ns Gain switching time
- <=4μA (typical) (IQ) Software and hardware shutdown
- Green product and no Sb/Br
测试与测量, 信号处理
(EN)
