The PCA9515ADR is a dual-channel bidirectional I2C Buffer is operational at 2.3 to 3.6-V VCC. It is a BiCMOS integrated circuit intended for I2C bus and SMBus systems applications. The device contains two identical bidirectional open-drain buffer circuits that enable I2C and similar bus systems to be extended without degradation of system performance. It buffers both the serial data (SDA) and serial clock (SCL) signals on the I2C bus, while retaining all the operating modes and features of the I2C system. This enables two buses of 400pF bus capacitance to be connected in an I2C application. The I2C bus capacitance limit of 400pF restricts the number of devices and bus length. Using this buffer enables the system designer to isolate two halves of a bus, accommodating more I2C devices or longer trace lengths. It has an active-high enable (EN) input with an internal pull-up, which allows the user to select when the repeater is active.
Active-high repeater-enable input
Lock-up free operation
Powered-OFF high-impedance I2C-bus pins
Accommodates standard-mode and fast-mode I2C devices and multiple masters
(EN)
