Ultralow power device feature an enhanced STM8 CPU core providing increased processing power while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low power operations. The device includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive in-application debugging and ultrafast Flash programming. The microcontroller feature embedded data EEPROM and low power low-voltage single-supply program Flash memory
Low power features
Advanced STM8 core
Reset and supply management
Clock management
Low power RTC
DMA
LCD: 8x40 or 4x44 w/ step-up converter
12-bit ADC up to 1 Msps/28 channels
2x12-bit DAC (dual mode) with output buffer
2 ultralow power comparators
Timers
Communication interfaces
Up to 67 I/Os, all mappable on interrupt vectors
Up to 16 capacitive sensing channels
96-bit unique ID
Fast on-chip programming and non-intrusive debugging with SWIM, Bootloader using USART
(EN)
