The M48Z58Y-70PC1 is a 64kB non-volatile ZEROPOWER? Static Random Access Memory (RAM) integrates power-fail deselect circuitry and battery control logic on a single die. It provides a highly integrated battery-backed memory solution. It is a non-volatile pin and function equivalent to any JEDEC standard 8K x 8 SRAM. It also easily fits into many ROM, EPROM and EEPROM sockets, providing the non-volatility of PROMs without any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed. The 28-pin, 330mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAT? housing containing the battery. Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the high temperatures required for device surface mounting. The SNAPHAT housing is keyed to prevent reverse insertion.
- READ cycle time equals WRITE cycle time
- Automatic power-fail chip deselect and WRITE protection
计算机和计算机周边, 工业, 通信与网络, 消费电子产品