The PCA9516AD is a 5-channel CMOS I2C-Bus Hub intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling five buses of 400pF. The I2C-bus capacitance limit of 400pF restricts the number of devices and bus length. Using the bus hub enables the system designer to divide the bus into five segments off of a hub where any segment-to-segment transition sees only one repeater delay.
5-channel, bidirectional buffer
Active high individual repeater enable input
Open-drain input/outputs
Lock-up free operation
Supports arbitration and clock stretching across the repeater
Powered-off high-impedance I2C pins
Latch-up testing is done to JEDEC standard JESD78 which exceeds 100mA
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