The 74HC574D is an octal D-type Flip-Flop with positive edge-trigger and 3-state is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL. It is specified in compliance with JEDEC standard no-7A. This octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops. The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the low-to-high CP transition. When OE is low the contents of the 8 flip-flops are available at the outputs. When OE is high, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
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