The JR28F064M29EWLA is a 64MB asynchronous parallel NOR Flash EMBedded Memory manufactured on 65nm single-bit cell (SBC) technology. READ, ERASE and PROGRAM operations are performed using a single low-voltage supply. Upon power-up, the device defaults to read array mode. The main memory array is divided into uniform blocks that can be erased independently so that valid data can be preserved while old data is purged. An on-chip program/erase controller simplifies the process of programming or erasing the memory by taking care of all special operations required to update the memory contents. The end of a PROGRAM or ERASE operation can be detected and any error condition can be identified. The command set required to control the device is consistent with JEDEC standards. The M29EW supports asynchronous random read and page read from all blocks of the array. It also features an internal program buffer that improves throughput by programming 256 words via one command sequence.
- Asynchronous random or page read
- Page access - 25ns
- Buffer program - 256-word MAX program buffer
- Program/erase controller - embedded byte/word program algorithms
- Program/erase suspend and resume capability
- READ operation on another block during a PROGRAM SUSPEND operation
- READ or PROGRAM operation on one block during an ERASE SUSPEND operation on another block
- BLANK CHECK operation to verify an erased block
- Unlock bypass, block erase, chip erase and write to buffer capability
- Fast buffered/batch programming
- Fast block and chip erase
- VPPH voltage on VPP to accelerate programming performance
- Protects highest/lowest block or top/bottom two blocks
- Software protection
- Extended memory block
- Program or lock implemented at the factory or by the customer
- Low-power consumption - standby mode
- 65nm Single-bit cell process technology
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