The DSPIC33FJ64GS606-I/PT is a 16-bit Digital Signal Controller with high-speed PWM, ADC and comparators. The PGECx and PGEDx pins are used for In-circuit Serial Programming? (ICSP?) and debugging purposes. It is recommended to keep the trace length between the ICSP connector and the ICSP pins on the device as short as possible. The CPU module has a 16-bit (data) modified Harvard architecture with an enhanced instruction set, including significant support for DSP. The CPU has a 24-bit instruction word with a variable length opcode field. The Program Counter (PC) is 23-bit wide and addresses up to 4M x 24 bits of user program memory space.
Two 40-bit wide accumulators
Single-cycle (MAC/MPY) with dual data fetch
Single-cycle mixed-sign MUL plus hardware divide
±1% Internal oscillator
Programmable PLLs and oscillator clock sources
Low-power management modes (sleep, idle, doze)
High-speed PWM - Up to 9PWM pairs with independent timing
High-speed ADC module - Dedicated result buffer for each analogue channel
Timers/output compare/input capture - Four input capture (IC) modules
Communication interfaces - Two UART modules (12.5Mbps)
4-channel DMA with user-selectable priority arbitration
Input/output - Selectable open-drain and pull-ups
Debugger development support - In-circuit and in-application programming
