The 25LC256-I/SN is a 256Kbit serial SPI bus EEPROM (Electrically Erasable Programmable Memory) in 8 pin SOIJ package. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are clock input (SCK), separate data in (SI) and data out (SO) lines. Access to device is controlled through chip select input. Communication to the device can be paused via hold pin. While device is paused, transitions on its inputs will be ignored with exception of chip select allowing host to service higher priority interrupts. It features more than 1 million erase/write cycles and data retention is greater than 200 years.
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