The IS42VM16160K-75BLI is a 268435456-bit CMOS Mobile Synchronous DRAM organized as 4 banks of 4194304 words x 16-bit. This is offering fully synchronous operation and is referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input and output voltage levels are compatible with LVCMOS.
JEDEC standard 3.3/2.5/1.8V power supply
Auto refresh and self refresh
All pins are compatible with LVCMOS interface
8K Refresh cycle/64ms
Programmable CAS Latency - 2,3 clocks
All inputs and outputs referenced to the positive edge of the system clock