The FIN1002M5X is a 1-bit Differential Receiver for high speed interconnects utilizing Low Voltage Differential Signalling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock or data. The FIN1002 can be paired with its companion driver or with any other LVDS driver.
0.4ns Maximum differential pulse skew
2.5ns Maximum propagation delay
Bus pin ESD (HBM) protection exceeds 10kV
Power-off overvoltage tolerant input and output
Fail safe protection for open circuit and non-driven, shorted or terminated conditions
(EN)
