The CY7C1360C-166AXC is a 9MB Serial Random Access Memory (SRAM) integrates 256K x 36 and 512K x 18 SRAM cells with advanced synchronous peripheral circuitry and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered clock input. The synchronous inputs include all addresses, all data inputs, address-pipelining chip enable, depth-expansion chip enables, burst control inputs, write enables and global write. Asynchronous inputs include the output enable and the ZZ pin. Addresses and chip enables are registered at the rising edge of clock when either address strobe processor or address strobe controllers are active. Subsequent burst addresses can be internally generated as controlled by the advance pin. Address, data inputs and write controls are registered on-chip to initiate a self-timed write cycle. Write cycles can be one to two or four bytes wide as controlled by the byte write control inputs.
Supports bus operation up to 200MHz
Registered inputs and outputs for pipelined operation