The AD9628-125EBZ is an evaluation board for evaluating AD9628 device with 1.8V supply, 12bit, 125MSPS ADC. It features a high performance sample and hold circuit and on chip voltage reference. The product uses multistage differential pipeline architecture with output error correction logic to provide 12bit accuracy at 125MSPS data rates and to guarantee no missing codes over the full operating temperature range. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built in deterministic and pseudorandom patterns, along with custom user defined test patterns entered via the serial port interface (SPI).
- 1.8V CMOS or LVDS outputs
- SNR = 71.2dBFS at 70MHz
- SFDR = 93dBc at 70MHz
- Low power of 74mW/channel ADC core at 125MSPS
- Differential analog input with 650MHz bandwidth
- IF sampling frequencies to 200MHz
- Onchip voltage reference and sample and hold circuit
- 2Vpp differential analog input
- 2V p-p differential analog input
- DNL = ±0.25 LSB
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