The AD7278BUJZ-500RL7 is a 8-bit high speed low power successive approximation Analog-to-digital Converter (ADC) features throughput rates of up to 3MSPS. The parts contain a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 55MHz. The conversion process and data acquisition are controlled using CS and the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on the falling edge of CS and the conversion is initiated at this point. There are no pipeline delays associated with the part. It uses advanced design techniques to achieve very low power dissipation at high throughput rates. This allows the widest dynamic input range to the ADC; therefore, the analog input range for the part is 0 to VDD. The conversion rate is determined by the SCLK.
Reference for the part is taken internally from VDD
