The AD1974YSTZ is a high performance, single-chip four Analog-to-digital Converter (ADC) with differential inputs. An SPI port is included, allowing a microcontroller to enable mutes and adjust many other parameters. The AD1974 operates from 3.3V digital and analog supplies. It is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board phase-locked loop (PLL) to derive the master clock from the LR clock or from an external crystal, the AD1974 eliminates the need for a separate high frequency master clock and can also be used with a suppressed bit clock. The ADC is designed using the latest continuous time architectures from analog devices to further minimize EMI. By using 3.3V supplies, power consumption is minimized, further reducing emissions.
Phase-locked loop generated or direct master clock
Tolerance for 5V logic inputs
Differential ADC input
SPI? controllable for flexibility
Software-controllable clickless mute
Software power-down
Right justified, left justified, I2S and TDM modes
Master and slave modes up to 16-channel input/output
(EN)
